IWS01: How to design a matching circuit that matches with the measurements?

Tuesday - 8:40-10:20am

Jaakko Juntunen

Optenni Ltd.

Dr Jaakko Juntunen is the sales director at Optenni Ltd since 2014. Before joining Optenni, he has worked in EDA industry since 2001, first as a customer service manager at APLAC Solutions Corporation, then as a sales manager and senior EM specialist at AWR corporation. Dr Juntunen has a PhD in computational electromagnetics and MSc in mathematics, both at Aalto University (formerly Helsinki University of Technology). He has contributed about 20 publications in scientific journals and international conference proceedings. His current research interests include decoupling network synthesis and power amplifier matching circuit design. 

Context

Matching circuit design is fundamental in RF, in particular with antennas. Single, narrow band is easy to match, but the practical matching problems are often much more demanding: the antennas may be small, there may be many bands to be matched simultaneously, and the bandwidths of each band must be carefully controlled. The only practical way to solve such general matching problems is to use simulators. This workshop introduces good measurement and simulation practises that greatly increase the likelihood of first-time-right match between simulated and measured performance. These practises involve VNA calibration, reference plane deembedding in software, layout modeling and use of real discrete component data.

Workshop structure

The workshop divides into two parts: lecture and demonstration. The starting point is identification and quantitative analysis of common error sources in the modeling and measurement domains. Special focus is on hand-made prototypes, where soldering and component placement accuracy vary, and the measurement reference plane accuracy requirement is often overlooked. Simple and practical methods and tests are suggested to estimate the related uncertainty of the prototype measurement results. On the modeling domain, the importance of accurate layout simulation of the matching circuit section is discussed. 

After the lecture part, the lessons learned are demonstrated by measuring and comparing with simulations a sequence of prototype samples, representing an increasing amount of attention to the error factors studied: (a) prototype based on rounding ideal inductor/capacitor values to the available component values in component libraries, omitting the layout; (b) prototype based on synthesis using real component libraries, but still assuming ideal connectivity; (c) prototype based on real component libraries and simple modeling of the layout; (d) prototype based on real component libraries and full EM model of the layout. The design process behind each of the prototype variants (a)-(d) using appropriate software tools is demonstrated.